1. Field of the Invention
This invention is related to the field of integrated circuits, and more particularly, to processing microcoded instructions within an integrated circuit.
2. Description of the Related Art
Certain instructions within the x86 instruction set are quite complex, specifying multiple operations to be performed. While it may be possible to implement hardware to execute any instruction directly, the cost of such implementation in terms of the number of transistors required and/or die area needed may be prohibitive in some cases. In the case of an instruction set like the x86 instruction set mentioned above, which is rich in complex instructions, the hardware required to execute all instructions directly may be enormous. In fact, current integrated circuit production methods may not be adequate to produce a single chip capable of executing all x86 instruction directly in hardware. Fortunately, other methods for executing complex instructions have been developed such as decomposing a complex instruction into a set of more elementary operations, referred to herein as microcode, which can be executed directly on hardware that is far less complex. Methods for executing these “microcoded” instructions are described in more detail below.
Often, complex instructions are classified as microcoded instructions. Microcoded instructions are transmitted to a microcode instruction unit within the integrated circuit, which decodes the complex microcoded instruction and produces two or more less-complex microcode operations for execution by the integrated circuit. The simpler microcode operations corresponding to the microcoded instruction are typically stored in a read-only memory (ROM) associated with the microcode unit. Thus, microcoded instructions are often referred to as microcode ROM (MROM) instructions. Once the microcode operations are output from the microcode ROM unit, these operations are typically included within the operation stream that is dispatched to one or more devices that schedule operations for execution (schedulers). Typical microcode ROM units, in effect, perform instruction expansion on the microcoded instruction.
Less complex instructions are typically directly decoded by hardware decode units within the integrated circuit. The terms “directly-decoded instruction” or “fastpath instruction” or “non-complex instruction” may be used interchangeably herein to refer to an instruction that is decoded and executed by the integrated circuit without the aid of a microcode instruction unit. Directly-decoded instructions are decoded into component operations via hardware decode, without the intervention of a microcode instruction unit, and these operations are executed by functional units included within the integrated circuit.
Microcode routines may be composed of any number of microcode operations. Typically the operations that make up a microcode routine are stored in sequential rows of a microcode ROM with a control sequence for each row. FIG. 1 shows a microcode ROM storing one group of microcode operations 720 along with one control sequence 710 per row. The operations of microcode routine one are divided into three groups. The first group 720A of the first microcode routine is stored in the first row of microcode ROM 700 along with control sequence 710A, which contains information indicating that microcode routine one is continued in the second row of the microcode ROM. The second group 720B of the first microcode routine is stored in the second row of microcode ROM 700 along with control sequence 710B which contains information indicating that the first microcode routine is continued in the third row of the microcode ROM. The final group of operations 720C is stored in row three. Similarly, the groups of microcode operations composing the other microcode routines and corresponding control sequences are stored in subsequent rows of microcode ROM 700. Some groups of microcode operations like 720F fill an entire row of the microcode ROM while others like 720D fill only a small fraction of a row's capacity. For example, when segmenting a microcode routine for storage in sequential rows of a microcode ROM, a group of operations at the end of the routine may contain one or two operations more than can be stored in a single row. The excess operation or two must be stored in the following row. Thus, a significant portion of the microcode ROM's storage capacity may be unused.